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PCI Express 3.0 Packet Switch From Diodes Incorporated Offers Design Flexibility and Advanced Power Management
Proprietary architecture employed in the PI7C9X3G816GP packet switch allows for enhanced flexibility and performance. It can be configured to have multiple port/lane width combinations, such as upstream, downstream, and cross-domain end-point (CDEP), to support fan-out and dual-host connectivity.
Unique to the industry is the integrated PCIe 3.0 clock buffer, which reduces the overall component count, eases product design-in, and helps to reduce bill-of-materials (BOM) cost. The PI7C9X3G816GP supports three reference clock structures: common, separate reference no spread (SRNS), and separate reference independent spread (SRIS). Multiple direct memory access (DMA) channels are embedded into the switch to facilitate efficient communication between the host (or hosts) and connected end-points.
Additional features such as error handling, advanced error reporting, end-to-end data protection with error correction, hotplug, and surprise removal provide enhanced reliability, availability, and serviceability (RAS). In addition, the built-in thermal sensor reports operational temperature instantly. Advanced power management means that the PI7C9X3G816GP aligns with the most stringent energy-saving requirements for building greener data centers. For instance, the packet switch supports seven power states to efficiently align with the power requirements and any inactive hot-pluggable ports are kept in a low-power state. Advanced diagnostic software tools, including PHY Eye™, MAC Viewer™ (embedded LA), and PCIBUDDY™, assist designers throughout system development.
Diodes Incorporated’s PI7C9X3G816GP is supplied in a high-performance flip-chip (HFC) package, with 324-ball BGA format and 19mm x 19mm dimensions. This packet switch has a unit price of
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