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PCIe 3.0 Packet Switch from Diodes Incorporated Offers Fan-Out and Multi-Host Capabilities
The PI7C9X3G1224GP has a low packet forwarding latency of less than 150ns (typical). Flexible port configuration of this device is achieved by having scope to allocate variable lane widths to each of its ports. For fan-out purposes, any port of the packet switch can be configured as upstream and connected to multiple downstream ports. Through cross-domain end-point (CDEP) configuration of certain ports, it is possible for multi-host arrangements to be supported - leading to boosted performance and expanded functionality. The adaptive receive side and transmit side equalization (RXEQ/TXEQ) features included assist with maintaining signal integrity levels and ensuring continued system stability.
The integrated PCIe 3.0 clock buffer is another plus point of the PI7C9X3G1224GP. This simplifies designs and reduces the overall bill-of-materials (BOM) costs. Advanced power management capabilities make it highly suited to system designs where energy saving gains are important. The operational temperature is continuously monitored using its built-in thermal sensor. Error reporting and other diagnostic functions are also included.
The PI7C9X3G1224GP is supplied in a 324-pin flip-chip BGA package format, and it is available at
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